Divider circuits are commonly used in integrated circuit devices to provide clock signals having a desired frequency. For example, a typical phase-locked loop (PLL) circuit may include a variable input divider that receives a clock signal from a crystal oscillator and divides the signal produced by the crystal oscillator down to generate a reference signal for a phase/frequency detector (PFD) of the forward path of the PLL. The output of the PLL may also be passed through a variable divider circuit and feedback circuitry of the PLL may also include a divider circuit. Divider circuits are also commonly used in clock distribution and other circuitry.
In many applications, it may be desirable to provide a variable divider that is controllable to provide variable division. It is generally desirable that such a variable divider be able to operate from a relatively high frequency input clock signal to allow the divider circuit to provide relatively high output resolution. However, maintaining high resolution while providing a large division factor range may be difficult.